Programmable Built-In Self-Testing of Embedded RAM Clusters in System-on-Chip Architectures
نویسندگان
چکیده
Multi-port memories are widely used as embedded cores in all communication System-on-Chip devices. Due to their high complexity and very low accessibility, Built-In Self-Test (BIST) is the most common solution implemented to test the different memories embedded in the system. This paper presents a programmable BIST architecture, based on a single microprogrammable BIST Processor and a set of memory Wrappers, designed to simplify the test of a system containing a large number of distributed multi-port memories of different sizes (number of bits, number of words), access protocol (asynchronous, synchronous), and timing.
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تاریخ انتشار 2012